
PCI-DAS4020/12 User's Guide Specifications
25
Accuracy
Table 9. Analog output accuracy specifications
Differential non-linearity
Total analog output error is a combination of gain, offset, integral linearity, and differential linearity error. The
overall absolute worst-case error of the board may be calculated by summing these component errors. Worst
case error is realized only in the unlikely event that each of the component errors are both at their maximum
level, and causing error in the same direction. Though this is very uncommon, it is still possible.
Digital input / output
Table 10. DIO specifications
Digital type (40-pin connector)
2 banks of 8, 2 banks of 4, programmable by bank as input or output
2.0 volts min, Vcc + 0.5 volts absolute max
0.8 volts max, GND 0.5 volts absolute min
Input mode (high impedance)
Interrupts
Table 11. Interrupt specifications
INTA# - mapped to IRQn via PCI BIOS at boot-time
DAQ_ACTIVE: Interrupt is generated when a DAQ sequence is active.
DAQ_STOP: Interrupt is generated when A/D Stop Trigger In is detected.
DAQ_DONE: Interrupt is generated when a DAQ sequence completes.
DAQ_FIFO_1/2_FULL:
Interrupt is generated when ADC FIFO is ½ full.
DAQ_SINGLE: Interrupt is generated after each conversion completes.
Interrupt is generated via edge-sensitive transition on the Interrupt In pin on the
40-pin connector. Rising/falling edge polarity selection. The Interrupt In pin is pulled
up to 5 V through a 10 K resistor.
External Interrupt Enable
Active low Interrupt Enable signal on the 40-pin connector. The Interrupt Enable pin
is pulled up to 5 V through a 10 K resistor.
Environmental
Table 12. Environmental specifications
Operating temperature range
Storage temperature range
Kommentare zu diesen Handbüchern